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Design of Digital Circuits - Lecture 2: Mysteries in Comp Arch (ETH Zürich, Spring 2018)

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01:26:20

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Design of Digital Circuits - Lecture 3: Introduction to the Labs and FPGAs (ETH Zürich, Spring 2018)

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01:27:53

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Design of Digital Circuits - Lecture 4: Mysteries in Comp Arch and Basics (ETH Zürich, Spring 2018)

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01:30:00

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Design of Digital Circuits - Lecture 5: Combinational Logic (ETH Zürich, Spring 2018)

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01:30:25

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Design of Digital Circuits - Lecture 7: Sequential Logic Design (ETH Zürich, Spring 2018)

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01:29:13

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Design of Digital Circuits - Lecture 8: Timing and Verification (ETH Zürich, Spring 2018)

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01:12:56

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Design of Digital Circuits - Lecture 9: Von Neumann Model, ISA, LC-3, MIPS (ETH Zürich, Spring 2018)

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01:30:11

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Design of Digital Circuits - Lecture 10: ISA (II) and Assembly Programming (ETH Zürich, Spring 2018)

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01:32:37

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Design of Digital Circuits - Lecture 11: Microarchitecture (ETH Zürich, Spring 2018)

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01:36:41

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Design of Digital Circuits - Lecture 12: Microarchitecture II (ETH Zürich, Spring 2018)

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01:30:12

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Design of Digital Circuits - Lecture 13: Microprogramming (ETH Zürich, Spring 2018)

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01:35:30

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Design of Digital Circuits - Lecture 14: Pipelining (ETH Zürich, Spring 2018)

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01:30:43

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Design of Digital Circuits - Lecture 15: Pipelining Issues (ETH Zürich, Spring 2018)

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01:33:04

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Design of Digital Circuits - Lecture 16: Out-of-Order Execution (ETH Zürich, Spring 2018)

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01:35:06

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Design of Digital Circuits - Lecture 17: OoO, DataFlow, Superscalar Exec. (ETH Zürich, Spring 2018)

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01:23:48

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Design of Digital Circuits - Lecture 18: Branch Prediction (ETH Zürich, Spring 2018)

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01:35:35

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Design of Digital Circuits - Lecture 19: Branch Prediction II, VLIW, FGMT (ETH Zürich, Spring 2018)

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01:35:16

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Design of Digital Circuits - Lecture 20: SIMD Processors (ETH Zürich, Spring 2018)

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01:34:47

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Design of Digital Circuits - Lecture 21: SIMD Processors II and GPUs (ETH Zürich, Spring 2018)

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01:30:37

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Design of Digital Circuits - Lecture 22: GPU Programming (ETH Zürich, Spring 2018)

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01:25:18

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Design of Digital Circuits - Lecture 23a: Systolic Arrays and Beyond (ETH Zürich, Spring 2018)

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01:06:37

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Design of Digital Circuits - Lecture 24: Memory Hierarchy and Caches (ETH Zürich, Spring 2018)

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01:34:51

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Design of Digital Circuits - Lecture 25a: More Caches (ETH Zürich, Spring 2018)

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01:10:02

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Design of Digital Circuits - Lecture 25b: Virtual Memory (ETH Zürich, Spring 2018)

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00:24:17

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Design of Digital Circuits - Discussion Session (ETH Zürich, Spring 2018)

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01:30:37

Design of Digital Circuits - Lecture 2: Mysteries in Comp Arch (ETH Zürich, Spring 2018)

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Design of Digital Circuits, ETH Zürich, Spring 2018 (https://safari.ethz.ch/digitaltechnik/)

Lecture 2: Mysteries in Comp Arch
Lecturer: Professor Onur Mutlu (http://people.inf.ethz.ch/omutlu)
Date: February 23, 2018

Slides (ppt): https://safari.ethz.ch/digital....technik/spring2018/l
Slides (pdf): https://safari.ethz.ch/digital....technik/spring2018/l

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